1. Field of the Invention
The invention relates to a method for processing a thermal ink jet silicon wafer printhead by partially etching into one portion of the wafer while completely etching through another portion of the wafer. More specifically, the invention relates to a method for anisotropically etching partially into one portion of a silicon wafer using an erodable mask material. The depth of the partial etching is controlled either by the rate of erosion of the mask material or the thickness of the mask material, so that the desired partial etch depth is obtained upon termination of the etchings in the remaining portions of the wafer.
2. Description of Related Art
Thermal ink jet printing is a type of drop-on-demand ink jet system wherein an ink jet printhead expels ink droplets on demand by the selective application of an electrical pulse to a thermal energy generator, usually a resistive heater, located in capillary-filled, parallel ink channels a predetermined distance upstream from the channel orifices or nozzles. The channel ends opposite the nozzles are in communication with a small ink reservoir to which a larger external ink supply is connected. The printhead normally includes a heater plate on which the heaters are located, and a channel plate in which channels are formed to serve as ink passageways for conveying ink from the ink supply to the resistors for expulsion at the nozzles.
Thermal ink jet printheads utilize the properties of Orientation Dependent Etching in the formation of channels in the channel plate. The wafer, which is preferably silicon, has its major surfaces lying substantially in the "100" plane and internal "111" planes at an angle for silicon of 54.7.degree. to the 100 planes. Openings are formed in the silicon wafer using an anisotropic etchant which works much more normally to the 100 plane than it does laterally or parallel to the 100 plane. Hence, the etchant works less in the 111 planes to thereby leave inverted pyramidal openings in the wafer. The location of the opening is determined by applying an etch mask to the surface of the wafer to be etched and then opening a via in the mask material through which the etchant can attack the 100 planes. The depth of the opening if etched to termination (i.e., when all exposed 100 planes are removed) is generally a function of the size of the via and the thickness of the wafer. For example, if the via opening, V, in the etch mask M is designed to produce a through-hole H just reaching the opposite side CS of a 20 mil thick silicon wafer (see FIG. 6B), it will actually produce a 1.4 mil wide opening 0 on a 19 mil thick wafer W2 (FIG. 6A) and will not produce any opening at all on a 21 mil thick wafer W3 (see FIG. 6C). Decreasing the size of the via opening V (FIG. 6D) will also affect the depth of the cavity since the size of the via determines the area of 100 planes subject to attack. In particular, the depth is defined by the following formula: the depth of the opening equals one-half the product of the smallest via opening dimension and the tangent of 54.7% (for a silicon wafer).
With this technology, it is possible to etch structural patterns in the silicon wafer with close dimensional tolerances. The patterns are formed by through-hole technique (e.g., FIGS. 6A and 6B which create a through-hole in the wafer), V-groove termination (e.g., FIGS. 6C and 6D which create a V-groove recess of a predetermined depth), or a combination of both. However, it is sometimes useful to produce large etch areas of varying depth that will terminate within the wafer at the same time, and the foregoing technology cannot readily satisfy this need. For example, if a 20 mil silicon wafer is patterned to include a through-opening and a V-shaped groove channel about 46-47 microns deep and about 65 microns wide, it will take about four hours for the etchant (e.g., 30% KOH at 95.degree. C.) to form the through-hole, but substantially less time to form the V-groove. For a single etching step operation, the wafer remains in the etchant until the through opening is completed, thus subjecting the V-groove to continued etchant exposure even after the V-groove etch has terminated. The longer the wafer remains in the etchant, the greater the possibility that the etchant will find a crystal defect in the V-groove which it could attack, thus affecting the desired 65 micron channel width.
An object of the invention is to obviate the foregoing disadvantages by providing a method for etching openings of varying depths in a wafer in a single etch step, so that the openings in the wafer will attain a desired etch depth at about the same time, thereby reducing the amount of time that a shallower opening is exposed to the etchant.
This and other objects and advantages are obtained by the inventive method which anisotropically etches partially into one portion of a wafer using an erodable mask material. The depth of the partial etching is controlled either by the rate of erosion of the mask material, and/or the thickness of the masking material, so that the desired partial etch depth is obtained upon termination of etchings in the remaining portions of the wafer.